Oxygen Engineering for Positive Bias Stress Stability of Top-Gated Indium Tin Oxide (ITO) Transistors

Amorphous oxide semiconductors like indium tin oxide (ITO) have attracted attention because their low-temperature deposition is compatible with back-end-of-line integration [ 1 – 3 ] . However, the stability of such oxide field-effect transistors (FETs) remains one of the primary challenges in their implementation. Recent studies have explored their threshold voltage ( V T ) stability under positive bias stress [ 4 – 6 ] , but the effect on parameters like field-effect mobility ( μ FE ) is seldom investigated. Here, we study top-gated indium tin oxide (ITO) FETs under positive bias stress, comparing devices with different V T achieved by O 2 engineering. We monitor the change in both V T and μ FE , as we perform stress measurements at room temperature (RT) and 85 °C. We achieve median |Δ V T | ≤ 60 mV at RT for all μ FE ≈ 5, 17, 23, and 37 cm 2 V −1 s −1 , with |Δ V T | increasing to ~50, 200, 460, and 390 mV at 85 °C respectively. We also explore the stress effect on μ FE for the first time in oxide FETs, observing up to 3× change in μ FE (from ~4.4 to 13.5 cm 2 V −1 s −1 ) upon stressing at RT.