Design and Verification of Ultra-Low Latency Intelligent Consumer Data Exchange Platform

Proposed as a consumer data exchange platform for USB-enabled systems, the following implements a four-port design based on a principle of enabling intelligent systems to request and provide data amongst themselves. Implemented as Register-Transfer Level (RTL) instructions in Verilog in the Xilinx Vivado environment, the paper illustrates how system-side logic may be used to implement direct data exchanges between peer systems. Once implemented, we further investigate switching latency across the platform, and position it multiple orders of magnitude ahead of leading switching platforms.