Revealing Ferroelectric Scaling Effect on Multidomain Negative Capacitance FET: Design Guidelines

The ferroelectric layer present in the gate stack of Negative Capacitance (NC) FET comprises multi-domains at which low to high domain states affect the device performance in general. The impact of the domain state becomes miserable with the ferroelectric (FE) thickness
$(\mathrm{t}_{\mathrm{F}\mathrm{E}})$
scaling. In this work, for the first time, using well-calibrated TCAD models, we demonstrate: 1) low domain states (lower g) in the FE layer are severely affected by drain-to-source voltage (VDS) dependent polarization switching; 2)
$t_{\text{FE}}$
scaling is needed for improved ION 5% improvement at
$\mathrm{t}_{\mathrm{F}\mathbb{E}}=1.7\text{nm}$
; 15% at
$\mathrm{t}_{\mathrm{F}\mathrm{E}}=4$
nm. However, increasing
$\mathrm{t}_{\mathrm{F}\mathrm{E}}$
, increases the polarization switching in the low domain state of the FE layer; 3)
$\mathrm{t}_{\mathrm{F}\mathrm{E}}$
scaling with a high domain state, reduces the
$\mathbf{V}_{\text{DS }}$
-dependent polarization switching and results in higher negative differential resistance (NDR) in I
DS
-V
DS
characteristic; 4) The NDR is of I
DS
-V
DS
is not suitable for analog circuit designing, therefore, design guideline is used for designing the common source amplifier at high domain state. Thus, the utilized design guidelines for multidomain NC devices provide the ~35db DC gain with the single stage.