TCAD-Based Investigation of a 3.3 kV Planar SiC MOSFET: BV-RON Trade-Off Optimization

In this work, the cell-level design of the elementary cell of a 3.3 kV SiC planar MOSFET is addressed. More specifically, the influence of cell pitch on static performances is quantified by means of 2-D TCAD Sentaurus simulations. The most relevant figures of merit (on-resistance, RON, and breakdown voltage, BV) are extracted in a wide range of half pitch (hp) values by keeping the total area of the device constant. The hp parameter turned out to be a determining factor for both RON and BV. In order to support the selection of the optimum design, (i) electric field and potential lines maps are provided to highlight the physical mechanisms behind the BV vs. hp behavior and (ii) an analytical RON model based on simple geometrical considerations is proposed and validated.