Power Efficient Novel CMOS Double-base to Binary Encoder (DBE)

Double-base number system can be promising substitute to usual single-base system owing to its redundancy property. Binary is the well-established number system in digital domain and hence, efficient double-base to binary encoding is utmost essential to exploit the advantage of doublebase system. In this paper a novel low power Double-base (binary & ternary) to Binary (base-2) Encoder (DBE) based on CMOS logic style is explored. The proposed two steps strategy consists of generating unary equivalent of double-base input by applying novel idea first and encoding unary result into binary next with conventional approach. The traditional CMOS Inverter is exploited to invert the double-base coefficient required for unary-generator. An illustrative [3×3]:4-bit DBEcircuit is optimized on 32n-meter typical ComplementaryMOS technology considering BSIM4 Device parameters with 900mili-V supply at 27°-Centigrade nominal temperature. The proposed DBE has been checked using T-Spice transientsimulations considering every probable test inputs. The layout of the circuit is done on 32n-meter SPDM process-node and the circuit characteristic with extracted parasitic is compared with most relevant counterpart to benchmark. The circuit performance with load variation is measured and recorded.