Performance Analysis of Gate-All-Around Transistor at Various Technology Nodes

The performance behavior and Short Channel Effects of Cylindrical Gate All Around Metal Oxide Semiconductor Field Effect Transistors at different channel lengths are investigated in this paper. The structure of GAA transistor is designed and analyzed its simulated electrical characteristics at various channel lengths (40nm, 30nm and 20nm) and different work functions (4.5, 4.7 and 4.9 eV). Furthermore, the surface potential, center potential and transconductance (gm) are demonstrated for different channel lengths. Moreover, the various other parameters like Drain Induced Barrier Lowering (DIBL), Subthreshold Slope (SS), On current (Ion) and Threshold voltage(Vth) are evaluated and analyzed for different channel lengths. These were also analyzed at different oxide thicknesses. All the simulations were done using Cogenda Visual TCAD software. Further, the causes of change in parameters at various channel lengths (40nm, 30nm and 20nm) are to be discussed.