A 7b 76mW 40GS/s Hybrid Voltage/Time-Domain ADC With Common-Mode Input Tracking

High-speed links require fast, moderate resolution ADCs with low power to maximize efficiency. Hybrid voltage and time (V+T) ADCs can combine the speed benefits of time-domain conversion with the reliability of conventional voltage-domain ADCs. This work demonstrates (1) how the V+T architecture can simplify time interleaving implementation and (2) highlights two methods for improving V+T sub-ADC robustness: (a) a voltage-to-time converter (VTC) with common mode input voltage tracking and (b) a merged time-to-voltage and flash time-to-digital converter. This is demonstrated in a 0.103 mm2 22nm CMOS prototype that consumes 76 mW and gives 32.3 dB SNDR with a Nyquist input at 40 GS/s, for 57 fJ/step FoMw.