Efficient Error-Tolerant Computation: Static Segmented Multipliers with Inner Approximation

A comprehensive study of Static Segmented Multipliers with inner approximation is presented in this research, including both signed and unsigned variations. The paper presents a unique segmentation strategy designed for unsigned multipliers to improve performance optimization. An efficient error-correcting mechanism has also been created to reduce hardware costs and eliminate approximation mistakes. The suggested correction approach results in SSMs having beneficial properties compared to current approximation multipliers. This is especially obvious in power usage vs tradeoff graphs of Normalized Mean Error Distance and Mean Relative Error Distance. Comparing the inner approximation SSMs to traditional techniques, the former shows reduced power and area usage. Moreover, real-world application experiments in classification and image processing confirm that SSMs are appropriate for jobs requiring error tolerance. The paper highlights the potential of Static Segmented Multipliers with inner approximation as dependable and effective computational solutions for digital circuits, providing a fair compromise between hardware prices, power efficiency, and error performance.