On Current Balance Control of Parallel IGBT in High Power Three -Level Inverters with Asymmetric Structures

Suppressing the static and dynamic current imbalance of parallel IGBTs is the key to stable operation of high pulse power inverters. Different from the symmetric structure of the traditional two-level inverter, the NPC three-level inverter circuit makes the parallel IGBTs asymmetric in the physical layout, which leads to the imbalance static and dynamic currents of the parallel IGBTs. Based on the analysis of the basic commutation path of NPC three-level inverter, the methods of adopting perforated multi-layer composite busbar and parallel digital active gate driver are proposed to solve the static and dynamic current sharing problems of parallel IGBTs with asymmetric structures. According to analysis of commutation paths, the method how to dig holes to obtain a multi-layer busbar with low stray inductances is studied, and a simulation using Maxwell 3D is also carried out, which guarantees the static current sharing of IGBTs. A digital driver which can drive two parallel IGBTs simultaneously is developed to achieve the dynamic current balance of IGBTs. The results show that the static and dynamic current imbalance of parallel IGBTs can be limited to no more than within 10% at a total current of 6kA, which validates the methods offered above.