A Power-Efficient, F-Band, 6.5-dB NF, Staggered-Tuned, Inverter-Based CMOS LNA for 6G Receivers

$\mathbf{A}$
CMOS low-power, wideband, transformer-less, low noise amplifier (LNA), operating in the F-Band (90 – 130 GHz), tailored for
$6\mathrm{G}$
receivers is introduced. This work marks the first utilization of a complementary NMOS-PMOS inverter topology at above 100 GHz frequencies, showcasing not only low noise-efficiency factor (NEF) and high
$g_{m}/I$
efficiency but also unparalleled energy efficiency due to the inherent current re-using feature of this structure. The stagger tuning across five gain stages facilitates a wide 40 GHz of RF bandwidth around the carrier frequency of 110 GHz. The use of simple CPW-based-matching networks rather than transformers leads to more precise electromagnetic modeling of the constituent passives. The proposed LNA is integrated with a previously-characterized down-conversion circuit to simplify the measurement process. The design, fabricated in a 22-nm FD-SOI CMOS process, occupies 0.08
$mm^{2}$
of silicon area and exhibits a minimum noise figure of 6.5 dB, while consuming only 7.5 mW of DC power. This power efficiency coupled with a low noise figure represents a new benchmark in CMOS LNAs at this frequency range.