A Compact 28-GHz Transmitter Front-End with Co-Optimized Wideband Chip-Antenna Interface Achieving 18.5-dBm P1dB and 1.0-W/mm2 Power Density for Phased Array Systems

This work presents a compact, 28-GHz transmitter (TX) front-end in 40-nm CMOS technology, and a co-optimized wideband chip-antenna interface for phased-array systems. The proposed TX consists of a mixer, 2-stage power amplifier (PA), on-board matching network (MN), and flipped patch antenna. By optimizing the biasing, a class-C first stage introduces a gain peaking to compensate for the compression of the second stage, enhancing linearity. Moreover, the design of the transformer is discussed in detail, from the design target to the layout, to increase the output power. To eliminate bandwidth deduction caused by the bonding wires and the long transmission lines, an on-board MN with two stubs is proposed. A 20-dBm saturation output power, l8.5-dBm P1dB, and 30.3% peak drain efficiency are achieved. The antenna with on-board MN achieves a 4.6-GHz bandwidth. Occupying 0.7×0.2 mm
²
per element, the PA achieves a power density of 1.0 W/mm
²
.