A 2.4 GHz, -19 dBm Sensitivity RF Energy Harvesting CMOS Chip with 51% Peak Efficiency and 24 dB Power Dynamic Range

This work proposes a 2.4 GHz wireless energy harvesting chip with a meander dipole antenna. The design was fabricated in a 180-nm standard CMOS process and occupies a chip area of 2.3 × 2.5 mm
²
while consisting of a reconfigurable rectifier, a bandgap reference, a maximum power point tracking controller, a 3× switched-capacitor charge pump, two regulators, and an ultra-low power diode. The design achieves a peak power efficiency of 51.9% at -4 dBm and sensitivity of -19 dBm. The peak power efficiency of SCCP3× is 97.2%, and the reverse leakage current of ULPD is less than 2 nA. The automatic maximum power tracking scheme extends the >20% power efficiency range to 24 dB.