Design of CNFET Based Approximate Full Adder for Motion Detector Application

The burgeoning demand for portable electronic devices has reached an exponential crescendo, necessitating an imperative focus on circuit speed to maintain power dissipation within acceptable thresholds. The Full Adder (FA) stands as an indispensable and pivotal component of the system; any optimization in the FA circuit reverberates in the optimization of the entire system. With technology converging towards the nano-scale regime, the escalation of leakage power has become a pressing concern. This paper presents the design of an inexact FA circuit employing a carbon nanotube field-effect transistor (CNFE T), strategically enhancing key performance metrics such as delay, leakage power, and energy consumption within the FA circuit. Leveraging inexact circuits prove to be an efficacious strategy for augmenting overall system efficiency. The primary objective of this paper is to architect an approximate FA circuit tailored for minimum power image processing applications used for major biomedical applications including wearable devices. The simulation endeavors are bifurcated into two levels: application and circuit. At the circuit level, a comprehensive assessment is undertaken, involving the calculation of average leakage power, delay, PDP, EDP, and dissipation of leakage power, with subsequent comparisons to reported data. Concurrently, at the application level, the PSNR is meticulously computed, providing a holistic evaluation of the proposed approximate FA cell performance.