A 160 Gb/s PAM-4 optical receiver using a fully differential transimpedance amplifier in SiGe BiCMOS

This paper presents a 160 Gb/s four-level pulse-amplitude modulation (PAM-4) optical receiver based on a 130nm SiGe BiCMOS (
$\mathbf {f_{T}/f_{MAX} = 350/450}$

$\mathbf {GHz}$
) fully differential transimpedance amplifier (TIA) and two silicon photonic Ge photodiodes (PDs). The high-speed path of the TIA consists of a TIA input stage (TIS) followed by two variable gain amplifiers (VGAs) and an output buffer. A novel fully differential input DC current cancellation (IDCC) circuit is proposed to absorb the input DC currents and eliminate the DC offset of the TIS. 80 GBd PAM-4 operation is demonstrated with an off-line 5-tap feed-forward equalizer (FFE), achieving -7 dBm in-waveguide optical modulation amplitude (OMA) sensitivity at KP4-FEC (
$\mathbf {2.4\times 10^{-4}}$
) and 0.99 pJ/b power consumption. 56, 64, and 72 GBd PAM-4 operations are demonstrated without any equalization, achieving -9.2, -8.4, and -5.9 dBm OMA sensitivity at KP4-FEC, respectively. To the best of our knowledge, this integrated optical receiver achieves the best sensitivity at KP4-FEC and the lowest power consumption for 64, 72 and 80 GBd PAM-4 operations.