FPGA Acceleration of DL-Based Real-Time DC Series Arc Fault Detection

A direct current (DC) series arc fault is an unintended and hazardous electrical discharge in a DC circuit. It poses a safety risk as it can potentially cause fire and damage electrical components. The urgency of detecting DC series arc faults lies in their potential to escalate into hazardous situations swiftly. Rapid identification of abnormal patterns associated with DC series arc faults is essential to trigger intervention measures immediately. In recent years, the focus of studies for the detection algorithms has been shifting from conventional methods toward machine learning (ML)-based approaches, because ML-based algorithms have the advantage of adapting to different circuit dynamics. While ML-based approaches have yielded positive results in the identification, implementing such computationally intensive algorithms in a time-critical application remains a challenge. This paper addresses this challenge through a hardware solution, proposing an embedded real-time detection system with an FPGA-based hardware accelerator to enhance efficiency. The solution implements an optimized ML-based algorithm on an Avnet Ultra96-V2 board. The hardware performance of the board is evaluated and compared to an NVIDIA Jetson Xavier NX board. The results show high efficiency of the FPGA-based accelerator for DC series arc fault detection, achieving a runtime of 60 μs and power consumption of 3.04 W at peak performance. This meets the application requirements and is comparable to the NVIDIA board, which achieves a minimum runtime of 143 μ s with 2.96 W.