Adaptive Mixed MLC-SLC FeFET Mapping for CIM AI Applications Through Simulated Annealing

This paper explores the novel use of ferroelectric field-effect transistors (FeFETs) in a mixed multi-level cell (MLC) and single-level cell (SLC) configuration, aiming to strike an optimal balance between area efficiency and data integrity. Addressing the inherent trade-offs in MLC configurations, which offer high bit capacity at the cost of increased error rates, we propose a mixed mapping scheme that effectively combines the advantages of both MLC and SLC configurations. Further, this study introduces a specialized fitting algorithm designed to identify the optimal configuration. Complemented by simulated annealing for hyperparameter tuning, this approach not only proves efficacious in this specific context but also offers adaptability for diverse design objectives.