RTPE: A High Energy Efficiency Inference Processor with RISC-V based Transformation Mechanism

The inference of DNN has always been widely applied in various scenarios, often requiring consideration of supporting different systems and deployment of artificial neural networks. This article introduces a 64-bit RISC-V based Transformation Processing Element (RTPE), which combines a RISC-V processors with DNN inference processors to support more flexible and comprehensive inference of artificial neural networks. At the same time, it has three technical improvements. Firstly, RTPE has an instruction based Real-time Data Segmentation and Reassembly (RDSR) method. Secondly, RTPE has a Typical Value Search and Correction (TVSC) system synchronized with the instruction stream, which converts direct computation into search and correction computation. Thirdly, RTPE includes instruction driven Data Format Preconfiguration and Precision-tuning (DFPP) schemes. Through the evaluation of the 28nm CMOS process, RTPE achieved better energy efficiency performance compared to the most typical pure inference processor UNPU.