Conducted Emission Simulation with ICEM Modeling and Measurement for HV Buck Integrated Circuit

Since recently developed smart devices and automotive electronics largely depend upon the power consumption control and converting efficiency, power management integrated circuits (PMIC) become necessary and more demanding to the system performance. However, the more severe switching noise emitted unintentionally from the highly efficient PMIC has also given rise to electromagnetic interference (EMI) problems within the device. Recent studies have shown that IC noise is the root cause of EMI problems during system integration, therefore the studies of IC-EMC would reveal the most effective solutions for suppressing EMI noise by measuring and analyzing the key issue of IC operation. With the IC EMI characteristic behavior, the IC manufacturers and their customers for system development will benefit to achieve product compliance in the early design stage. This study is based upon the current probe method of IEC 61967-4 [1] Standard for conducting electromagnetic emission measurement at the chip level of High-Voltage Buck IC for further EM model simulation. We will then generate the Chip Power Modeling (CPM) behavior model of the PMIC by utilizing the ANSYS Totem tool and implementing the EM characteristics of the related evaluation board to proceed with the EMI simulation on board level according to the ICEM-CE modeling of IEC 62433-2. We will then finally compare the conducted EMI results from measurement and simulation to analyze the effect of PMIC switching activity. The methodology described in this study for chip-level EMI analysis will be helpful in the early IC design stage for EMI problem resolution to reduce the development cycle and cost.