ZeroScatter BLE: All-Digital, Fully Synthesizable Bluetooth Low Energy (BLE) Backscatter Communication in Verilog RTL for FPGA-Based Devices

ZeroScatter BLE is an all-digital, fully synthesizable approach for adding Bluetooth Low Energy (BLE) backscatter wireless data uplinks to existing field-programmable gate arrays (FPGAs). Unlike conventional FPGA-based BLE devices that require an external BLE chipset in addition to the FPGA, ZeroScatter BLE is fully synthesizable from Verilog register transfer language (RTL) code. This allows ZeroScatter BLE to be be implemented on billions of existing FPGAs. A tri-state capable digital I/O pin, a stable digital clock that's divisible to 1 MHz, and a 2.4 GHz antenna connected directly to the FPGA I/O pin are required to form the BLE backscatter device. An external carrier source in the 2.4 GHz band is then backscatter modulated with a BLE subcarrier using the two distinct RF impedances formed by the FPGA I/O pin direction switching between logic-zero and tri-state. Our experimental setup includes a signal generator serving as a 2.4 GHz carrier wave (CW) source. This CW source is backscattered by an antenna attached to a Lattice iCE40 FPGA running the ZeroScatter BLE logic. The resulting BLE backscatter signal is then received by an unmodified iOS or Android device using a commercial BLE scanner app. With a CW carrier power of +30 dBm, we have verified a bistatic range exceeding 4 m in a multipath-rich indoor environment, using an unmodified iPad as the BLE receiver. This work points the way toward wireless communications links created entirely from commodity digital logic.