Hardware Analysis on NVDLA Using RESNET50

The NVIDIA Deep Learning Accelerator (NVDLA) on the Xilinx ZCU104 platform is thoroughly analyzed and benchmarked in this research report. With the help of the RESNET50 model and the default architecture and runtime settings of NVDLA, we were able to initially get a throughput of 4.97 frames per second (fps). Then, in an effort to boost performance, we looked into improving the runtime environment and architecture. By incorporating Winograd algorithms which are renowned for their effectiveness in parallel computing further improvement was accomplished. Processing speed increased significantly when Winograd was enabled. This improvement highlights how deep learning inference jobs can be expedited by using parallel computation approaches. In order to maximize the performance of hardware acceler-ators such as NVDLA, our results highlight the significance of runtime and architectural optimization. Considerable throughput increases can be attained by customizing these parts to the unique features of the intended platform. In addition, the integration of sophisticated algorithms like Winograd offers a viable path for additional performance improvement. By providing insights into the optimization methodologies relevant to NVDLA on the ZCU104 platform, this research adds to the increasing body of literature on deep learning inference acceleration. Developers and researchers looking to use NVDLA efficiently in edge computing and embedded AI applications where throughput and efficiency are critical can benefit greatly from the approaches and findings discussed here. Furthermore, our work emphasizes how crucial it is for researchers, developers, and hardware makers to work together to drive innovation and performance advances in deep learning hardware acceleration.