High Performance Optimized and Unified Bus Monitor for Distributed Avionics Architecture Validation Under Hardware-in-Loop Simulation Framework

The Avionics system of the aerospace and defense industry designed with complex distributed architecture. Every system is intelligent and processing data on it's own. The subsystems communicate with the onboard computer which is the main unit of avionics system. This data exchange is based mostly on serial communication with a maximum rate of 1 Mbps. Many data communication protocols are available; among them most popular is the MIL-STD-1553 because of dual redundant and simple architecture. The data traffic on the MIL-STD 1553 bus is monitored and recorded on the Bus Monitor. The configuration was one Bus Monitor for one communication node. In the case of multi-mode avionics configuration more than one Bus-Monitor is essential to integrate. These Bus Monitor configured separately with no synchronization among them. The development of a single computer-based multi-node optimized Bus Monitor for distributed architecture is designed and developed. The new design and development process of optimized multi-mode Bus Monitor under the real time Linux platform is explained in this paper. Further, the unified Bus-Monitor for number of aerospace project's configuration is developed and deployed on high performance processor architecture with optimized embedded computer. The development has been done for Hardware-In-Loop Simulation facility that is used for validation of avionics software