MicroENet: An Efficient Network for MCUs with Low Model Parameters and Peak Memory

Machine learning (ML) is increasingly vital for IoT applications and Industry 4.0. Compared to uploading data to the cloud for ML inference. Utilizing ML for local low-power IoT device analysis can conserve energy and ensure data privacy by avoiding cloud uploads. However, the inference of convolutional neural networks (CNNs) usually requires large intermediate activation maps and involves substantial parameters. Most IoT devices have only <320KB SRAM and <2MB Flash. To address these resource constraints, this paper proposes a novel model MicroENet with only hundreds of KB peak memory and parameters. Firstly, the memory bottleneck lies in the first few blocks of the CNNs so that we reduce the output channels of the first layer of the model and employ efficient downsampling in the second layer to decrease the image size quickly, bypassing the large activation layer. Then, the enhanced attention depthwise blocks (MCU-Blocks) are proposed, which have high parametric efficiency. Based on these blocks, we develop a tiny architecture with an ImageNet accuracy of 63.9%. Impressively, this result is achieved using only 245KB peak memory and 0.96 million parameters. In the visual wake word experiment, the size of our model is further reduced and achieves 89.64% accuracy with 28KB peak memory. Finally, MicroENet is deployed on the STM32F746 microcontroller for the image classification task. The experimental results show that our model outperforms others with similar peak memory and parameters.