A Discrete Channel Model to Estimate Threshold Voltage Deviation Induced by The Voltage Stress in SiC Short Channel MOSFETs

The threshold voltage
$(V_{TH})$
of silicon carbide (SiC) MOSFETs are affected by the coupled effect including the SiO
2
/SiC poor interface and the short channel effects (SCEs), and this coupled effect is directly related to gate voltage
$(V_{GS})$
and drain voltage
$(V_{DS})$
. This paper introduces a discrete channel model to estimate the V
TH
deviation caused by the different voltage stress on both sides of SiC MOSFET short channel. Transfer characteristics are used to verify the accuracy of the model. It is indicated that the poor interface is the dominant factor for these deviations of
$V_{TH}$
, Power MOSFETs were fabricated to further validate the model and revealed that the source resistance also contributes to the deviations especially with the increasing of drain-source current in MOSFET.