Layout Concern on Power Devices Based on 0.18μm 200V SOI-BCD Technology for Stable Electrical Characteristics and Reliability

Based on the 0.18μm 200V SOI-BCD technology, the influences of the high operation voltage from the adjacent power devices have been investigated and compared, including the nLDMOS, the LIGBT and the pLDMOS. The adjacent high operation voltage takes limited effects on the nLDMOS and LIGBT used source outside layout. However, the electrical features and reliability of the pLDMOS used drain outside layout are influenced to be unstable. The pLDMOS layout of source outside seems to be better than the one of drain outside. Furthermore, a double DTI structure is proposed for and turn to be an effective solution for stable application to screen the high operation voltage from the adjacent power devices.