Development of Vertical-Channel Fin-SiC MOSFET for 3.3 kV Applications

We have developed a 3.3 kV SiC Vertical-Channel Fin MOSFET, original structure named VC Fin-SiC. The JFET structure was optimized using TCAD simulation to achieve low on-resistance and high reliability. Our evaluation of the static and switching properties demonstrate that VC Fin-SiC can achieve low on-resistance with high threshold voltage and small switching loss with fast turn-on even for high voltage applications thanks to its structural superiority.