HIL Co-Simulation of Proportional Resonant Sliding Mode Control Based FPGA for a Three-Phase Grid-connected VSI System

This work presents an FPGA implementation Based of sliding-mode control (SMC) and a proportional-resonant (PR) scheme for grid-connected three-phase voltage source inverter (VSI) based LCL-filter. The proposed strategy necessitates generating three-phase reference voltage of the filtering capacitors. However, their calculation involves a derivative operation, which is commonly avoided in control algorithms due to its complexity. To circumvent this issue, the generation of the capacitor voltage is accomplished through the application of a PR controller, eliminating the need for derivatives while achieving accurate tracking reference currents. The digital implementation of the PR based SMC controller is detailed and evaluated through MATLAB/Simulink and Xilinx system generator (XSG) integrated platform. The hardware-in-the-loop (HIL) co-simulation via Digilent BASYS 3 evaluation and development FPGA kit aids in controller performance evaluation.