Design of VLSI Architecture Using AES Algorithm

Security in signal processing involves implementing robust encryption techniques and authentication measures to safeguard sensitive information from unauthorized access or manipulation, ensuring the integrity and confidentiality of processed data in various applications. This paper presents a pioneering VLSI architecture merging Discrete Wavelet Transform (DWT) with robust encryption algorithms for fortified security in data processing. Aimed at embedded systems, it ensures data integrity and confidentiality. By marrying DWT’s computational efficiency for analysis and encryption prowess of AES, it enables real-time processing while safeguarding sensitive information. The design harnesses parallel processing, augmenting throughput and reducing latency for extensive data volumes. Comparative results highlight superior performance in speed, security, and resource utilization over traditional systems. This adaptable framework finds application in secure communications, biomedical signal processing, multimedia encryption, and IoT devices, addressing the critical intersection of signal processing and data security. This VLSI integration of DWT and advanced encryption presents a potent solution for secure, efficient data processing in resource-limited environments. The proposed system exhibits an on-chip power consumption of 535mW, a memory capacity of 819.922 MB, and a gain of 519.445 dB, all while maintaining a stable junction temperature of 33°C.