A Review of Advancements and Trends in Time-to-Digital Converters Based on FPGA

Recently, advancements have been made in the design, implementation, and application of time-to-digital converters (TDCs) based on field-programmable gate array (FPGA) technology. The progress can be attributed to the low cost, short development cycle, and easy integration offered by FPGA platforms, which continuously provide TDCs with state-of-the-art high-performance hardware featuring low latency, low jitter, and multiple interfaces. Moreover, the progress has been driven by the demand for high-performance TDCs tailored to specific applications. The demand has driven the improvement, upgrading, and iterative optimization of various modules within TDC systems. Therefore, we present a comprehensive review and summarize the research reports on FPGA-based TDCs. The aim of the review is to clarify the ongoing efforts to improve measurement resolution and precision, reduce nonlinearity, and enhance the reliability of TDCs in specific applications. This review summarizes and analyzes the development of FPGA-based TDCs from both technical and application perspectives to consolidate past research findings and outline the directions for future research. This article reviews the latest literature on the implementation architecture and performance of FPGA-based TDCs, refining the classification methods for implementation architectures and summarizing the performance evaluation metrics. Through comparisons and analysis, this review identifies the limitations faced by FPGA-based TDC research, highlights pressing issues that need to be addressed, and explores potential challenges that may arise.