CoaCAD: Correlation-Assisted Computer-Aided Design for Nonvolatile FPGAs

Nonvolatile field-programmable gate arrays (FPGAs) offer advantages in terms of high logic density and near-zero leakage power when contrasted with conventional static random access memory-based FPGAs. However, they have a lifetime issue. To deal with this problem, a series of configuration files can be generated with various logical-to-physical mappings. This enables intensive writing to be distributed across different physical regions for wear leveling. Currently, the configuration files are independently generated, which is time consuming. In this article, we propose to investigate correlations and use them to assist the computer-aided design (CAD) flow to speed up the procedure of generating configuration files. First, we develop dynamic probabilities to drive the swapping of placement stage in CAD flow, so as to push components to locate appropriate positions quickly. Second, we design the congestion information inheritance strategy to adjust routing parameters in the routing stage, aiming to reduce the number of routing attempts. Evaluation shows that the proposed schemes can deliver 44.15% decrease in placement and routing runtime, while maintaining comparable performance and lifetime, when compared with existing strategies.