Design and Verification Challenges in SoC Integration of PicoRV32 RISC-V with Sigma-Delta ADC

This paper introduces an innovative system-on-chip (SoC) architecture that seamlessly integrates a PicoRV32 RISC-V core with a sigma-delta analog-to-digital converter (ADC), with a strong focus on verification, synthesis, and physical implementation. Utilizing Universal Verification Methodology (UVM), the paper ensures the robustness of the SoC for complex digital systems that require precise control. Through iterative design and verification processes, the SoC meets the stringent requirements of power, performance, and area, demonstrating its potential for low-power, high-performance applications. Key contributions of this work include the demonstration of sigma-delta ADC integration with RISC-V cores and a comprehensive verification process.