An On-State Resistance Monitoring Method of T-type Three-Level Inverters

The on-state resistance of power semiconductor devices is the most widely used indicator of aging. Consistently and accurately monitoring the switching on-state resistance is one of the most effective ways to monitor the entire lifetime of a switching device. This paper presented a method for monitoring the on-state resistance of a T-type three-level inverter. The approach calculates on-state resistance by monitoring the voltage vectors in αβ coordinate system and the current values in abc frame. Furthermore, a rise in on-state resistance might signal an approaching open-circuit mishap. Simulations have been used to validate the suggested method’s validity and feasibility.