Characterization of Ultra-low Random Jitter Reduction Methods up to 36 GHz

This paper describes methods for reducing and measuring random jitter (RJ) of clock signals in multi-GHz test instruments. The methods are based on real-time averaging of parallel/synchronized signals with uncorrelated RJ. Prior work (up to 10 GHz) is extended by experimental demonstration up to 36 GHz with RJ below 200 femtoseconds (fs). The theory of operation is reviewed and experimental results are shown for 12 and 36 GHz. A de-embedding procedure is used to separate the jitter contribution of the test instruments (jitter "floor") from the measured values to obtain a better estimate of the actual ultra-low jitter values of the measured signals. The effects of amplitude imbalance, signal-skew, cycle-to-cycle jitter correlation, and component-added RJ are measured and analyzed.