Development of Thick-Core Substrate Material for Cutting-Edge IC Packaging

Rapid evolution of semiconductors is driving the progress of cutting-edge technology not only in High Performance Computing (HPC) but also IoT devices, autonomous cars, generative AI, and medical instruments. Large-scale Integration (LSI), with its role in a wide variety of functions, is driving this development. Currently, packaging schemes differ depending on the end use. Increasingly, LSI chips are mounted planarly on a FC-xGA substrate board, or where so-called multiple chips are simultaneously mounted on one board, with LSI chips interconnected three-dimensionally. Advances in these LSI connection methods have improved device processing power and I/O numbers, but there are two associated challenges. One: as the number of I/Os increases, the connections between LSI chips and the substrate board need to be more precise, making it more difficult to ensure connection reliability. Two: as the substrate boards with multiple chips become larger, controlling warpage during the mounting process is an increasing issue. Because of these issues, the XY dimensional stability, thickness uniformity, and flatness of the substrate itself has become more important than ever to ensure performance and connection reliability. Bringing the CTE of the substrate material closer to that of the LSI chip helps to control warpage. Another solution is to increase the thickness of the substrate material itself. However, this method causes other issues with plating through hole (PTH) formation, including conductivity, and special care must be taken with drilling processability.In this research, we utilized our unique resin technology to develop a low-CTE substrate material with good dimensional stability, thickness uniformity, and PTH processability as an answer to the characteristics required for cutting-edge substrates.We confirmed that the material has a very high level of thickness uniformity of ±10 um in-plane at the panel level for a 1.0 mm thick material. The dimensional stability was confirmed to be 50% or more compared to conventional advanced materials. Considering the LSI mounting process, thickness uniformity contributes to the Z direction, and dimensional stability contributes to the X-Y direction. These are material properties that can improve high density interconnect to LSIs. We also achieved improvements in PTH processability. Although the PTH diameter φ is generally limited to 200um when the material thickness is above 1.4mm, we confirmed that it has good workability even when it is set to φ150um. This makes it possible to greatly increase the degree of freedom in designing the substrate board. As a further study to reduce the diameter of PTH, we performed machining with φ135um on a 1.0mm thick material and confirmed that it showed good accuracy without any breakage issue on the drill bit. This makes it possible to increase the number of I/Os within the substrate, which means that the material can also contribute to improving the performance of the whole device. While its CTE performance is on par with conventional cutting-edge products, this material has several processing and performance advantages.In recent years, glass substrates have been attracting attention as a material that can achieve even lower CTE. Glass substrates have a low CTE comparable to silicon, dimensional stability, and thickness uniformity, and efforts to adapt them as substrate materials are becoming more active. We are also working on the development of even lower CTE materials that can compete with glass substrates and this paper will also report on the that activity.