A Novel Method for LPDDR5 DRAM Jitter Measurement Through De-embedding

A simple and innovative methodology for obtaining the total jitter (TJ) of LPDDR5 RDQS at the die pad output is proposed in this paper. A test board is fabricated to measure and restore the precise jitter of RDQS which includes differential clock-generating commercial chips and LPDDR5 DRAM with silicone rubber sockets. With 25,600 UI, equivalently 4 microsecond data operating at 6.4 Gbps, lower than 20 ps of TJ is measured through oscilloscope (The exact value is not disclosed in this for the security matter). To calculate the transfer function between the RDQS port at the die pad and the oscilloscope port, the frequency response of each component in the measurement channel was obtained. The frequency response of the fixture connecting DRAM to oscilloscope is calculated through 2x-thru de-embedding method. By applying transfer function and inverse FFT calculation, TJ was decrease by several picoseconds.