Abstract:
As the electrode spacing of the chip decreases, the diameter of the via holes in the redistribution layer or build-up substrate must also decrease. Here, we have demonstr...Show MoreMetadata
Abstract:
As the electrode spacing of the chip decreases, the diameter of the via holes in the redistribution layer or build-up substrate must also decrease. Here, we have demonstrated a via hole creation with a diameter of 3 microns on Ajinomoto Build-up Film (ABF) by irradiation of a picosecond, 266-nm wavelength laser. A copper wiring pattern was created on a glass substrate, and 3-micorometer-thick ABF was attached on top of the pattern, which was used as a model substrate.
Date of Conference: 28-31 May 2024
Date Added to IEEE Xplore: 26 June 2024
ISBN Information: