Thermo-mechanical and electromagnetic simulations of a Half-Bridge Insulated Prepackage for Modular Power Modules

Wide bandgap (WBG) semiconductors, SiC and GaN-based power devices represent key candidates in the development of more efficient devices due to their superior electrical and thermal properties compared to silicon. To achieve maximal performance from WBG semiconductors, new packaging technologies and thermo-electric designs must be developed to ensure efficient and fast switching of devices while minimizing losses. The paper aims to investigate the thermal and mechanical behavior of new prepackage embedding technologies by finite element simulation. The focus is on insulated substrates including direct bonded copper (DBC) with various dielectrics such as AlN, Al2O3, Si3N4 and new insulated metal substrates (IMS) with emphasis on commercially available materials and thicknesses. This study proposes a thermo-mechanical Pareto-optimization methodology able to identify the best substrate configuration. The sintered silver layer (in both sides of the chip), which is the most prone to failure due to delamination, has been modelled with a temperature-dependent bilinear hardening model to account for plasticity. Pareto-optimization accounts for the module thermal resistance and the plastic strain or Von Mises Stress in the sintered layer. Results demonstrate that the best candidate from the thermo-mechanical point of view is the DBC with AlN showing a thermal resistance of 0.34 K/W, accumulative plastic strain of 0.18 % and Von Mises stress of 274 MPa. Finally, the parasitic inductance of multiple prepackages is evaluated to scale the power of the module. Proper design allows to achieve a stray inductance as small as 1.23 nH for two prepackages and 2.85 nH for four prepackages.