Design and Verification of Advanced Microcontroller Bus Architecture (AMBA) Advanced Peripheral Bus (APB) Protocol

Very Large Scale Integration System (VLSI) technology enables the integration of millions of transistors on single chip is called System on Chip(SoC). Advanced Peripheral Bus (APB), a key component of the Advance Microcontroller Bus Architecture (AMBA) family, is a simple interface designed to reduce power consumption and simplify device connections within a SoC. In this paper a more efficient and effective design and verification methodology for the AMBA APB protocol is designed for SoC applications. The primary goal is to thoroughly examine and comprehend the APB protocol’s various functional aspects. The goal is to simulate and validate the protocol’s behavior using Verilog for Design and verify using Cadence tool set. An RTL view and an extracted AMBA APB module at the system are displayed in the paper’s results section. To gain insights into its operations as a result of these efforts, ensuring adherence to its specifications and operational standards. The proposed work aims to delve into the protocol’s complexities, increasing our understanding and facilitating its effective integration into SoC architectures.