SAM: Segment-Based Approximate Multiplier Design for Efficient Digital Signal Processing

Recently, there has been a widespread uptake of approximate computing in applications that can tolerate moderately imprecise outputs. [1]. This tolerance level enables the development of more straightforward hardware, intending to save both space and energy. In this paper,We introduce an innovative method for multiplying two unsigned binary values utilizing a segmentation-based approximate multiplier (SAM). Our approach reduces the dimensions of the Partial Products Matrix (PPM) from
$\mathbf{n}\times (\mathbf{2}\mathbf{n}-\mathbf{1})$
to an R-PPM of
$\mathbf{4} \times \mathbf{2}\mathbf{n}$
. Additionally [2], eradicates the necessity for additional hardware to compress and reconstruct partial outcomes.In contrast to the conventional Wallace tree multiplier, our fundamental design requires 32.43% less on-chip space while delivering outcomes that surpass those of other cutting-edge designs, such as TOSAM, LETAM, and DQ4:2C4, by 89.1% in accuracy.