Novel Device Fingerprinting Sensor Leveraging Back-End-of-Line Resistance and Capacitance

This paper presents a novel time-based R C sensor for measuring the time-constants of nets to simultaneously provide die authentication, and tamper detection. The IC routing is typically designed to minimize resistance and capacitance, leading to small RC time-constants that are challenging to measure directly. To overcome this challenge, a “three-config” measurement approach is proposed that uses three larger RC time-constants to derive the intrinsic time-constant of the net. This method reduces quantization error by over 82 % while incurring only a 25 % area penalty compared to direct measurement. An analytical model is developed to demonstrate the impact of the parasitic capacitance in discharge path. This analytical model matches with simulated results pretty well, with a maximum difference of only 3.2 %.