An Accurate High-Voltage Supply-Referred Low-Impedance On-Chip Reference Voltage for Optimized Driving of High-Side PMOS Transitors

This paper presents the design of a high-voltage supply-referred reference voltage as a high-side (HS) current sink for the power management unit and output driver of a Gate Shaper Integrated Circuit (GSIC) for Silicon-Carbide (SiC) power MOSFETs. In order to provide reproducible patterns at the gate of the power MOSFETs this current mode gate driver employs a fine resolution in time and current requiring fast transients for switching the currents. To provide fast transient currents cascode power transistors are driven with 5 V drivers requiring an accurate supply-referred low-impedance reference voltage for sinking the charge of the driven gate. The reference voltage
$V_{ref, LI}$
is provided by this HV-reference to the gate of PMOS clamp transistors supplying the drivers with a low-impedance voltage sink of 15 V at a 20 V supply voltage and the capability of sinking currents of 50 mA. The design has been fabricated on an area of 0.048 mm
²
in a O.18 µm HV BCD technology and has been evaluated in simulations and measurements. Further, the design is implemented in a control loop with a DC power consumption of 167.8µA from 20 V and 7.04µA from 5 V supply voltage and a phase margin of 67.7°.