A Closed-Loop Readout Circuit with Voltage Drop Mitigation for Emerging Resistive Technologies

Emerging resistive technologies include several nonlinear devices with the capability of changing their resistive state based on the voltage (/current) across (/flowing through) the device. The state of these devices is typically read by applying a small DC voltage across the DUT and measuring the current flowing through it (or vice-versa). However, given their non-linear behaviour, a change in voltage across the device, albeit small, will result in a change in the measured resistance. This is undesirable when characterising these devices, as voltage drops due to metal routing or switches in the signal path will affect the measured resistance. This work puts forward the idea of closing the loop by sensing the voltage across the DUT through a Kelvin connection, and then making adjustments to the line voltage to compensate for any voltage drop. This in turn enables larger arrays, and a higher number of states to be read because of the increased precision. An on-chip CMOS design is proposed through the use of a dual-input-pair amplifier. The resulting system is capable of driving a load between 1 kΩ and 10 MΩ with a settling time less than 1 µs for a DUT read voltage of 0.5 V.