Optimal data distribution in FeFET-based computing-in-memory macros

Computing-in-memory (CIM) may offer a power-efficient solution to the acceleration of major workloads for memory-bound deep neural networks given memory and processing units on the same die, particularly, when incorporating the processing units into the memory domains. Further, CIM macros utilizing nonvolatile memory with multibit data significantly boost their data density and realize zero standby power by gating power when idle. Ferroelectric Field-Effect-Transistor (FeFET) is a leading contender for this type of CIM. In this work, we designed mixed signal CIM macros based on FeFETs and identified their optimal performance with the size of a sub-array (n
M
× n
w
) addressed at one cycle, where n
w
is the number of FeFETs representing a single w-bit weight. The simulations performed identified the optimal sub-array $n_M^{\ast} \times w/2$ for w-bit weights with different $n_M^{\ast}$ (i.e., parallelism) for different weight resolution w, which highlights a ∼29× improvement in figure of merit for 8-bit weights compared with the case of no weight-splitting (n
w
= 1).