Curriculum Development for Tapeout-Ready Mixed-Signal System-on-Chip Design and Assembly

This paper proposes a new curriculum for under-graduate students that teaches chip-level design and assembly for developing a complete, tapeout-ready System-on-Chip (SoC) that includes synthesized digital components, analog/mixed-signal blocks, and IP such as memories and I/O drivers. The course will guide students through the process of synthesizing RTL into layout blocks, floor planning, chip-level routing of components, simulation, verification, and tapeout using a 45 nm public-domain PDK. By the end of the class, students will be capable of designing a complete, verified, and tapeout-ready SoC containing complex digital microcontroller circuitry and analog/mixed-signal front-ends. The course will take students through the steps to design and assemble a chip based on an existing SoC designed at the authors’ university. This will lead to the development of a workforce capable of designing mixed-signal SoC solutions for broader industrial and academic needs.