SRAM-Based PUF with Noise Immunity Achieving 0.58% Native BER in 55-nm CMOS

In this paper, a novel static random-access memory (SRAM) based physical unclonable function (PUF) with ultra-low native bit error rate (BER) is proposed. In the conventional 6T SRAM PUF, the thermal noise weakens the effect of the inherent mismatch on the PUF cell output at the initial power-on transition time, resulting in a high native BER. To realize a low native BER, a 7T PUF with noise immunity is proposed. Through inserting a mono-stable state before the bistable state, the 7T cell avoids the noise impact during the power-on transition period and amplify the mismatch voltage, resulting a huge native BER reduction. Two custom SRAM PUFs adopting 6T cell and 7T cell respectively, were fabricated in 55nm CMOS process to evaluate BER characteristics. The experimental results show that the native BER of the proposed 7T SRAM PUF is only 0.58%, which is nearly 11X lower than the 6T PUF of 6.12%. And as temperature varying from -25°C to 75°C, the worst BER of 7T PUF is 2.31% and is around 5X lower than the 6T PUF of 11.9%. In addition, raw bits generated from the proposed 7T PUF also passed the National Institute of Standards and Technology (NIST) randomness tests.