A Novel 2.7 pJ/bit, Low Supply, Power Efficient, Wide-Range 2.5-6 Gb/s Transmitter for 4-Channel High-Speed Serial Transmit Port (HSSTP) in 28nm FD-SOI Technology

This paper presents the design and experimental results of a transmitter developed in 28nm FD-SOI technology for a 4-channel High-Speed Serial Transmit Port (HSSTP). Body-biased differential pairs of CML drivers provide a larger voltage head room for the tail current source at 0.9V supply, which reduces area (84.6%) with respect to conventional architecture. The design allows data transmission from 2.5-6.0 Gb/s over a 50 cm cable and uses on-chip programmable pre-emphasis to compensate channel loss as well as optimize excessive ringing caused by wire bonding. It relaxes the pre-emphasis design required at Nyquist frequency without compromising eye height. This further reduces the overall power consumption (37.8%) of the transmitter. Here, the transmitter complies with the Grade 0 automotive temperature range (-40°C to 150°C) and beyond up to 165°C.