Application of Graph Isomorphism Analysis Algorithms for Scheme-Topological Verification of Complex Microelectronic Objects

The paper presents the results of the authors research in the field of schema-topological verification. It describes methods and means of decision making about the conformity of topological design results to a given electrical scheme. Verification is carried out by constructing graphs of the original electrical circuit and the circuit extracted from the topology and analyzing them for isomorphism.