A Software Designed to Generate Transistor Models with Interconnections

In this paper, an algorithm is developed to generate a transistor model that takes into account parasitic parameters of its interconnections. The algorithm includes the following steps: determining parasitic parameters of the transistor footprint and interconnections on the PCB and inside its enclosure, and setting the parameters of the SPICE-model of the transistor crystal. Based on this algorithm, a graphical interface of the program module for creating augmented transistor models has been developed. The models take into account parasitic parameters of its interconnections that depend on a particular radio-electronic device to be developed. To verify the model, we created an augmented model of the BFR91A bipolar transistor. Applying this model, we built a model of an oscillator circuit and simulated this circuit using the transistor model provided by its manufacturer. The augmented model significantly reduced the voltage amplitude at the output of the oscillator (by 7.38 dB) and increased the oscillation start-up time (from 2 to 9 µs), This indicates that the augmented transistor model provides simulation results that reflect its behavior under real-world operating conditions.