Non-Fragile PIDA Controller Design for Time-Delayed Uncertain System

In modern power system, phaser measurement units (PMUs) have been installed for information sharing between subsystems. Due to the large installation of PMUs, the time-delay occurs between control subsystems. In the presence of time-delay, power system network shows the instability in voltage and frequency. So, this paper proposes the robust, optimal, and non-fragile controller for a perturbed automatic voltage regulator (AVR) system with measurement time-delay. The perturbed AVR dynamic model is designed by considering parametric uncertainty in time constants of AVR subsystem models. In addition, the perturbation in controller coefficients is an important problem in real-time implementation of controller for industrial applications. In this regard, this paper proposes the non-fragile PIDA controller design. The tuning of the proposed non-fragile PIDA controller is carried-out using Kharitonov’s stability criterion and constrained genetic algorithm (CGA). The proposed controller is designed for the worst-case plant model, which is computed from the perturbed AVR model using Kharitonov’s interval stability theorems. Further, the effect of measurement time-delay in the feedback sensor model is considered. The effectiveness and performance of the proposed controller is assessed by comparing it with the recently published control schemes in the presence of terminal voltage disturbances, parametric uncertainty, and measurement time-delay.