Concept Evaluation of a DDFS and RFDAC-Based FMCW Modulator

This article describes a method of deriving and verifying hardware specification of a direct digital frequency synthesizer (DDFS) and radio frequency digital-to-analog converter (RFDAC)-based frequency-modulated continuous-wave (FMCW) modulator. The analysis of the concept is conducted by studying the digital nonlinearities, such as amplitude quantization noise, phase quantization noise, and frequency error in the ramp, and analog nonlinearities, such as IQ quadrature error and counter inter modulation-3 (CIM3) of the RFDAC. The impact of the nonlinearities on the detectability of target in the intermediate frequency (IF) spectrum is evaluated with the MATLAB model of the frequency modulator. The outcome of the concept evaluation predicts the low-level hardware specifications needed for the design such as amplitude quantization, phase quantization, expected noise level, spur positions in the target IF spectrum, and frequency error in the ramp. The RFDAC-based FMCW modulator is manufactured in 28-nm technology with the derived parameters and the time-domain data of a frequency ramp from 5 to 9-GHz in 100
$\mu $
s is sampled during measurement. The data are postprocessed to confirm the predictions made by the simulation model and to characterize ramp linearity, dynamic phase noise (DPN), and settling time of the ramp. The frequency error for a 4-GHz ramp in 100-
$\mu $
s duration is ±100kHz, and the settling time in the postprocessed result is in the 20-ns range.