Design of 4:2 Compressor for Low Power and Area Efficient Based On 5-NM FinFETs

In recent decades, the semiconductor manufacturing has got an exponential growth in the mixing of hypermedia based submissions into transportable electronic devices. As a result, meeting the goal of setting high standards for newly developed small power and extraordinary achievement in digital signal processing processors has gained importance. Over the past 20 years, the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has remained the chief combined circuit device. Beginning with the 20-nm generation, Fin Field-Effect Transistors, or FinFETs, have begun to replace MOSFETs in recent years. Subsequently, nodes with sophisticated technologies should be highly sought after for applications where low power consumption and speed are essential. Therefore, using 5-nm FinFETs, this study proposes designing a 4:2 compressor for low control and space efficiency. The 5-nm technology is essentially compatible with the preceding 7-nm procedure in terms of design instructions, which should reduce redesign costs and save time. Boolean algebra and logic gates are used in the 4:2 compressor's architecture to carry out the necessary arithmetic operations. It makes it possible to handle bigger binary integers and carry out more intricate arithmetic operations when using many compressors in tandem. The proposed design performs better than the earlier designs, with notable gains in area and power, according to the simulation findings.